Google Begins Transition Toward Android RISC-V
RISC-V has witnessed rapid growth in recent years and has been adopted in mobile computing, servers, accelerators, and more.
- Google has announced that Android devices powered by RISC-V instruction set architectures are likely to be available in the near future.
- Google has already partnered with Qualcomm to use RISC-V ISA hardware for wearable devices.
Google has announced its intention to strengthen its support for RISC-V open instruction set architecture (ISA) in Android devices. The University of California, Berkeley initially developed the RISC-V, and its adoption by Google signals a significant shift in hardware ecosystems.
The RISC-V is modular and allows developers to use optional extensions, which allow for high-performance CPU capabilities. With Google’s announcement, developers are expected to build, test, and operate Android-based support for the ISA on their devices.
Google is expected to take major steps regarding RISC-V soon, including the availability of Canary builds and finalizing NDK ABIs. According to the Google blog post, the company plans to make emulators public, enabling developers to test apps in a broader range.
Google is also working on the RISE project in collaboration with key industry players such as Samsung, Intel, Nvidia, and Qualcomm to support the availability of software for power and performance-efficient RISC-V processor cores on varied operating systems.
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Qualcomm and Google extended their partnership in October 2023 regarding RISC-V platforms for wearable devices. The RISC-V solution for wearables will be used along with Google’s Wear OS and will allow a larger number of products to use custom CPUs based on the Snapdragon model.
The move is key to the industry as RISC-V provides unique features that allow significant improvements in terms of customization of software and hardware, as compared to conventional alternatives, which will impact device manufacturer operations in notable ways for years to come.
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